In the fabrication of semiconductor devices such as integrated circuits, memory cells, and the like, a series of manufacturing operations are performed to define features on semiconductor wafers (“wafers”). The wafers include integrated circuit devices in the form of multi-level structures defined on a silicon substrate. At a substrate level, transistor devices with diffusion regions are formed. In subsequent levels, interconnect metallization lines are patterned and electrically connected to the transistor devices to define a desired integrated circuit device. Also, patterned conductive layers are insulated from other conductive layers by dielectric materials.
To build an integrated circuit, transistors are first created on the surface of the wafer. The wiring and insulating structures are then added as multiple thin-film layers through a series of manufacturing process steps. Typically, a first layer of dielectric (insulating) material is deposited on top of the formed transistors. Subsequent layers of metal (e.g., copper, aluminum, etc.) are formed on top of this base layer, etched to create the conductive lines that carry the electricity, and then filled with dielectric material to create the necessary insulators between the lines.
Although copper lines are typically comprised of a PVD seed layer (PVD Cu) followed by an electroplated layer (ECP Cu), electroless chemistries are under consideration for use as a PVD Cu replacement, and even as a ECP Cu replacement. Thus, an electroless plating process can be used to build the copper conduction lines. During the electroless plating process, electrons are transferred from a reducing agent to the copper ions in the solution resulting in the deposition of reduced copper onto the wafer surface. The formulation of the electroless copper plating solution is optimized to maximize the electron transfer process involving the copper ions in solution. The plating thickness achieved through the electroless plating process is dependent on the residency time of the electroless plating solution on the wafer. Because the electroless plating reactions occur immediately and continuously upon exposure of the wafer to the electroless plating solution, it is desirable to control the application of the electroless plating solution to the wafer.